Arquimea is an Aerospace and Defense supplier and fabless design house focused on analog and mixed signal microelectronics for high reliability applications with expertise on radiation mitigation by design. Recently, the European Space Agency (ESA) asked Arquimea to develop several circuits including LVDS devices running on extended signal voltages, beyond the voltage domains available for the standard IOs in the IHP SiGe BiCMOS 0.25um process. One of the critical design parameters was the target to protect the ICs against severe electrostatic discharge (ESD) stress of 8kV.
The project started with a study of the IHP process to understand the opportunities for ESD protection as well as the weaknesses (sensitive devices) and the circuits to be protected. The parties then designed 3 blocks for verification on the IHP process.
A dedicated test chip with several ESD clamps and diodes, all scaled to reach 8kV HBM.
Functional sub-circuits, protected with the most appropriated ESD clamps.
An Octal LVDS repeater for fast communication where the interfaces were protected by the ESD clamps. Initial results show that the different ESD clamp and diode cells reach about 5A TLP, the tester limit at the test house. The example below shows analysis on the bidirectional clamp used for the -4V to 5V interface that can be used in cold sparing interfaces. Functional testing is in progress.